Which cache-coherence-protocol does Intel and AMD use?

For my bachelor thesis I have to analyse the effecs of False Sharing on multicore systems. So looking for the different cache-coherence-protocol-types I have come across on Wikipedia that Intel has developed the MESIF cache-coherence-protocol, but there is no information that Intel also uses this.

Looking at the manual Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 3A I couldn't find anything about MESIF but the MESI-protocol. So the question is, doesn't Intel use its own cache-coherence-protocol. Or am I searching it in the wrong document.